1. Field of the Invention
The present invention relates generally to a method of forming a contact plug in a semiconductor device, and more particularly to a method of forming a contact plug in a semiconductor device that shortens heat-treatment time while minimizing degradation of the device characteristics due to high thermal budget.
2. Description of the Prior Art
With increasing miniaturization of semiconductor devices, diffusion control of dopants is an important factor for preventing the thermal stress related degradation of refresh and other transistor characteristics. For example, the typically short gate length in a micro-size semiconductor device requires implanting of excessive ions in order to obtain the desired threshold voltage. Excessively implanted ions cause gradual reduction of the refresh characteristics of the semiconductor device. The doped ions, such as phosphorous (or the phosphorous ions), are known to diffuse into the junction part or a cell transistor in a thermal process. This diffusion of doped phosphorous causes deterioration of the refresh characteristics of the semiconductor device.
The phosphorous are doped into a contact plug to obtain the effect of improving the refresh characteristics of the semiconductor device. In particular, the phosphorous is diffused into the polysilicon material of the contact plug, thereby lowering the doping effect. If the doping density of phosphorous is excessively lowered, the contact resistance would increase, which in turn would cause the current driving force of the semiconductor device to be significantly reduced. Thus, it is necessary to dope the phosphorous under well-designed process conditions that will prevent these types of problems and pitfalls.
One conventional method proposes forming a contact plug using epitaxial silicon as the plug material intended to obtain a superior interfacial property with reduced contact resistance even if the doping density of phosphorous is lowered.
In order to use the epitaxial silicon as the plug material, it is necessary to clean the surface of a substrate before the epitaxial silicon is grown. If defects, such as etching residues and natural oxides, exist between the surface of the substrate and the plug, the contact resistance may increase even if the epitaxial silicon is used for the plug, so it is difficult to obtain desired device characteristics.
The conventional pre-treatment process includes sequential performance of dry and wet cleaning processes and a hydrogen bake process (that is, a hydrogen heat-treatment process) under a high temperature condition above 800° C. Since the epitaxial silicon growth process is carried out at a temperature condition above 800° C., the thermal budget is considered high, causing degradation of the device characteristics.
Thermal budget generally refers to the total amount of thermal energy transferred to the semiconductor device during a given elevated temperature of operation. Therefore, the thermal budget is proportional to the temperature condition and the duration of the process done on the semiconductor device. Low thermal budget is generally desired in the manufacture of micro or smaller size semiconductor devices to prevent problems due to the dopant diffusion or dopant redistribution.
After the pre-treatment process of the surface, the solid phase epitaxy (SPE) method allows the growth of epitaxial silicon, according to which method amorphous silicon is first deposited on the wafer under a predetermined deposition temperature condition and then the deposited amorphous silicon is grown into epitaxial silicon through a following heat-treatment process.
This SPE method too has a problem that some part of the deposited amorphous silicon may be grown into epitaxial silicon, while leaving some other part of the amorphous silicon not affected or not grown (which results in a state of an interfacial surface), thereby causing a dual structure. The conventional technique of overcoming this problem requires very long (i.e., at least several hours) heat treatment process time under a temperature condition of 550 to 650 ° C. This will cause the amorphous silicon to be crystallized as the epitaxial silicon. Obviously, such a requirement of long heat-treatment process time reduces the productivity of the semiconductor devices.
Even though the SPE method may appear to help attenuating the high thermal budget problem by utilizing the temperature condition of 550 to 650° C. during the epitaxial silicon growth process, the SPE method still cannot alleviate the high thermal budget problems caused by the high temperature condition in the pre-treatment process, such as the hydrogen heat-treatment process requiring the temperature condition above 800° C.